1. Field of the Invention
This invention relates to electrical circuit devices such as field effect transistors (FETs), and more particularly to such devices and a method of fabricating the same on a gallium arsenide (GaAs) substrate.
2. Description of the Related Art
GaAs devices have been developed which offer considerably higher speed operation than other semiconductor materials, for both discrete devices and digital integrated circuits. However, GaAs is a difficult material to work with because its surface is typically characterized by dangling bonds and surface defects which seriously limit the range of the gate voltage that can be applied to an FET. Present GaAs technology limits the positive gate voltage swing to between about 0 and 0.7 volts. This places severe noise margin limits of about 20 to 30 mV on devices with threshold voltages near 0 Volts, and imposes rigid controls on circuit designs and processing.
Whereas other semiconductor materials such as silicon and indium phosphide can support metal-oxide semiconductor FETs (MOSFETs), attempts to use GaAs with a deposited dielectric (e.g., SiO.sub.2) as a gate insulator have resulted in large surface state and surface defect densities. This in turn "pins" the Fermi level to about 0.8 eV below the conduction band such that it cannot be controlled by the gate voltage. To avoid this, the gate contact is made directly to the semiconductor substrate surface to form a Schottky junction rather than forming a dielectric insulating layer between the gate contact and the channel as with silicon or InP. Unsuccessful attempts have been made for many years to locate or devise a dielectric that can successfully passivate the surface states encountered with GaAs. This problem is discussed in greater detail in S. D. Offsey et al., "Unpinned (100) GaAs Surfaces in Air Using Photochemistry," Applied Physics Letter 48 (7) pp. 475 (Feb. 1986).
The attainment of larger gate voltage swings would greatly improve the prospects of being able to use GaAs in large complex digital integrated circuits. Another desired application for GaAs devices would be to use them in an inversion mode. The "pinning" of the Fermi level prevents GaAs devices from being operated in an inversion mode.
For silicon and InP devices in which gate insulators are commonly used, investigations have been reported concerning the use of Langmuir-Blodgett (L-B) films as the insulating medium. L-B films are formed from amphophilic molecules with a hydrophobic "tail" and an ionizable "head", and are reported for example in an article by Hans Kuhn, "Functionalized Monolayer Assembly Manipulation", Thin Solid Films, 99, pp. 1 (1983). A laboratory set-up was reported for InP by G. G. Roberts, et al., Solid State & Electron Devices, "InP/Langmuir-film m.i.s.f.e.t.", Vol. 2, No. 6, pp. 169, Nov. 1978. In the described set-up, source and drain electrodes were evaporated onto an InP surface, with a gap between the source and drain defined by a tungsten wire which acted as a shadow mask. An L-B film was substituted for SiO.sub.2 as the gate insulator. The described fabrication process resulted in relatively large scale devices and was not applicable to small integrated circuit processing for microelectronics. A comparable laboratory approach for forming rudimentary silicon devices with L-B film substituted for the usual SiO.sub.2 gate insulator was described in Lloyd, et al., "Amorphous Silicon/Langmuir-Blodgett Film Field Effect Transistor", Thin Solid Films, Vol. 99, pp. 297 (1983). Neither of these reports, however, was suggested as being applicable to GaAs, which heretofore has not been capable of supporting an insulating gate layer.